High performance semi-transparent Si-based carrier-selective passivating contacts for c-Si solar cells manufactured at different thermal budgets

Silicon solar cells based on PERC architecture [1][2] have become the new industrial standard beyond the Al-BSF architecture [3]. To aim at higher efficiencies, research is on innovative architectures based on carrier-selective passivating contacts (CSPCs) for quenching recombination mechanisms at contact interfaces. Focussing on Si-based CSPCs, low thermal budget heterojunction (HTJ) cells and high thermal budget TOPCon-like cells have achieved record efficiency values ~26% in both front/back-contacted (FBC) [4] [5] and interdigitated back-contacted (IBC) [6] [7] configurations. However, these architectures are challenging from upscaling stand point; thus, leaner and cost-effective processes that can enable efficiencies between 24% and 25% on large area are industrially appealing.
In this contribution, we first review the opto-electrical properties and passivation quality of in-house developed semi-transparent CSPCs based on silicon alloyed with oxygen or carbon and manufactured at different thermal budgets. Then, starting from standard FBC cell configuration and recognizing the inherent parasitic optical losses due to Si-based CSPCs, we monitor the evolution of short-circuit current density in simple-process FBC and IBC devices endowed with our semi-transparent CSPCs.
In case of low thermal budget CSPCs compatible with HTJ architecture, we have developed and optimized n-type and p-type nc-SiO_x:H layers, which concurrently exhibit wide band gap, optimal crystallinity fraction and low activation energy (E_a-n = 46.6 meV and E_a-p = 89.6 meV). These properties make our nc-SiO_x:H layers excellent candidates for ideal carrier transport [8]. When employed in a double-side textured cell precursor based on 280-μm thick n-type FZ c-Si wafer, our nc-SiO_x:H layers enable iV_OC = 735 mV and iFF = 86.85% with τ_eff > 10 ms at also Δn < 10¹⁵ cm^-3. Rear junction devices based on such type of precursors, completed with sputtered ITO and Ag-based screen-printed contacts, present efficiencies in excess of 21% with J_SC = 39.1 mA/cm² for cell area of 7.84 cm² [9]. While further back-end optimization is needed to demonstrate higher efficiencies, this material system can boost the efficiency of FBC HTJ devices well beyond the current 25.1% efficiency record [4].
Passing to high thermal budget CSPCs, we have studied, as function of thickness, a wide range of poly-Si(O_x)(C_x) material systems by means of LPCVD (i.e. double-sided) or PECVD (i.e. single-sided) deposition routes with ex-situ (implantation, diffusion) or in-situ doping and on flat or textured interfaces. Even though we have realized poly-Si CSPCs with thickness down to 6 nm (textured n-type poly-Si, V_OC = 728 mV, J₀ = 6.5 fA/cm²), our best n-type (p-type) CSPCs are 35-nm (20-nm) thick poly-SiO_x layers, which exhibit iVOC up to 740 (716 mV) and J0 down to 3 (11) fA/cm². These layers, similarly to poly-SiCx layers [10], can be more transparent than poly-Si counterparts. As such, we have introduced polyO_x-polyO_x FBC devices [11][12], which could yield 21.5% for cell area of 1 cm², by slightly improving the V_OC of our poly-poly FBC standard devices (V_OC = 691 mV vs V_OC = 682 mV) and massively enhancing the J_SC (J_SC = 40.7 mA/cm² vs J_SC = 38.1 mA/cm²) without the use of any dual anti-reflective coating (DARC). To further augment the J_SC, we have devised a simple-process IBC poly-Si architecture, that exhibits J_SC-DARC = 42.2 mA/cm² [13] with 23% for cell area of 2 cm² [14].

References
[1] F. Fertig, et al., SiliconPV (2019)
[2] Press release Longi (2019)
[3] S. Gatz, et al., RRL (2011)
[4] D. Adachi, et al., APL (2015)
[5] A. Richter, et al., SOLMAT (2017)
[6] K. Yoshikawa, et al., Nat. En. (2017)
[7] C. Holleman, et al., PiP (2019)
[8] P. Procel, et al., SOLMAT (2018)
[9] Y. Zhao, et al., in preparation (2019)
[10] A. Ingenito, et al., IEEE JPV (2019)
[11] O. Isabella, et al., patent 2017E00057 NL (2017)
[12] G. Yang, et al., APL (2018)
[13] G. Yang, et al., patent 017880 NL-PD (2018)
[14] G. Yang, et al., SOLMAT (2018)

Biography

Olindo Isabella received the M.Sc. degree in Electronics Engineering from the University of Naples Federico II in Italy for a work on I/Q modulators for radio-frequency applications. In September 2007 he joined the Photovoltaic Materials and Devices group at Delft University of Technology, where he obtained the PhD degree cum laude under the supervision of prof. dr. Miro Zeman. During the final year of his PhD, he was visiting researcher at the National Institute of Advanced Industrial Science and Technology, Tsukuba (Japan), in the laboratory of prof. Michio Kondo. In February 2013 he engaged an academic career at TU Delft. Currently he is Associate Professor and since January 2019 he is the head of the Photovoltaic Material and Devices group at Delft University of Technology, where he manages the PV Laboratory and gives lectures on PV Systems.
His areas of expertise are opto-electrical modelling, characterization and implementation of advanced light management techniques in thin-film and wafer-based silicon solar cells, smart PV modules, PV-powered multi-functional building elements and comprehensive modelling of XIPV systems. For these developments, he is the principal investigator of Solar Urban theme of TU Delft Urban Energy platform and of the Advanced Metropolitan Solution in Amsterdam. He has been or is involved in the organization of OSA, MRS meetings, IEEE PVSC and nPV workshop conferences, contributed to four scientific books, has 9 patent applications and his H-index is currently 24 (Google Scholar).